recruiter locuri de muncă în București

Are you an experienced engineer passionate about Pre-Silicon Verification in Analog/ Mixed-Signal designs? Do you enjoy solving complex challenges, collaborating with cross-functional teams, and ensuring high-quality deliverables? Join our team and take the lead in driving innovative verification solutions for cutting-edge IP blocks and SoCs.

Job Description
In this role, you will develop and execute Pre-Silicon Verification plans to ensure the functionality and performance of our IP blocks and SoCs, collaborating with Design Engineers and supporting product validation and production ramp-up.

In your new role you will:

• Interpret product requirements , product specifications and (customer) use cases to develop and maintain Pre-Silicon verification plans
• Verify the functionality and performance of our IP blocks and SoCs , debugging and reviewing the results in close collaboration with Design engineers
• Execute the system level verification plan by creating and maintaining a Mixed-Signal test bench and regression environment
• Plan and monitor verification tasks and report progress to the project manager
• Support the product validation , debug activities and production ramp-up
• Drive and support risk assessment and provide documented compliance of delivered work products.
  

Your Profile
You enjoy taking on challenges and continuously developing your skills. With strong communication skills, you build lasting relationships and networks while proactively identifying and addressing potential risks. You coordinate effectively with colleagues, sharing insights regularly, and work in a structured way, always maintaining high-quality standards for yourself and others.

You are best equipped for this task if you have:

• A Master’s degree in Electrical, Electronic Engineering or equivalent
• At least 3 years of experience in Pre-Silicon Analog/ Mixed-Signal Verification including setup and execution of Analog/ Mixed-Signal simulations, or similar skills
• Knowledge in design and/or verification of Bandgap, LDO, Comparators, Operational Amplifiers, Oscillators, or Temperature sensors
• Understanding of HDL simulation flow (entity, architecture, configurations, libraries, packages, compilation, etc.) and previous experience in simulating HDL models
• Knowledge of the latest RTL verification methodologies (OVM, UMV) is a plus
• Experience with behavioral modelling languages (Verilog-A, Verilog- AMS, Verilog-HDL, System Verilog, System C) is a plus
• Experience with scripting languages such as Shell, Perl, TCL, Python, etc.
• Fluency in English , and German is a plus

Contact:
Inês Chaves, LinkedIn

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